1. Field of the Invention
The present invention relates to a multilayer electronic component.
2. Description of the Related Art
In recent years, a demand for miniaturization of electronic parts associated with the high densification of electronic circuits used in digital electronic devices such as mobile phones has increased, and the miniaturization and capacity enlargement of multilayer electronic components constituting the circuits have been rapidly advanced.
Patent Document 1 discloses a laminated capacitor equipped with an element body where internal electrode layers including a first internal electrode and a second internal electrode and intermediate internal electrode layers including a third internal electrode are alternatively laminated via dielectric layers.
This ceramic capacitor can prevent variation of electrostatic capacity due to lamination slippage even if lamination slippage with respect to a width direction of the third internal electrode is generated between the internal electrode layers and the intermediate internal electrode layers.
In the first internal electrodes and the second internal electrodes, a width of each lead electrode is smaller than a width of each active electrode portion. Thus, plating solution is hard to intrude at the time of forming a first terminal electrode and a second terminal electrode on a first end surface and a second end surface of the element body by plating, and it is possible to prevent reliability degradation of the laminated capacitor due to intrusion of plating solution.
However, the conventional technique has no choice but to reduce an area where the internal electrode and the external electrode are connected, and thus has a great difficulty in achieving small size and large capacity.
Patent Document 1: JP 2012-209493 A